Does anyone know what this code is in gates leves?
like change in to gates, AND gates etc!
module IOcont(DIN, RESET,CLK, serial_IO, AddrOut, chipSel,DataOut);
input RESET; //The reset signal.
input CLK; //clock
input serial_IO; // The serial port through which communication to the external
// system occurs.
input chipSel; // This is the handshaking signal from the external system telling the
// input IO controller that it is ready to send data
input[13:0] DIN; // A signal from the processor which tells the input
// IO controller to receive data from the external signal
output [13:0] AddrOut; // The 14 bit data is converted into a parallel 14 bit data,
// then stored in AddrOut register.
output [2:0] DataOut;
reg [13:0] AddrOut;
always begin
if(chipSel == 1)begin
AddrOut = DIN;
end
else begin
AddrOut = AddrOut;
end
end
endmodule
2007-12-05
07:29:03
·
2 answers
·
asked by
Anonymous