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2007-03-25 22:10:27 · 2 answers · asked by Anonymous in Science & Mathematics Engineering

2 answers

With a D-latch, the logic state on the D input is transferred to the Q output when a clock pulse is applied to the C input.

In common usage, a D-flip flop is a particular case of a D-latch where the Not-Q output is connected back to its own D input, so that the Q output changes state on each clock pulse.

2007-03-25 23:01:46 · answer #1 · answered by lunchtime_browser 7 · 0 0

A D-type flip-flop is two D-latches in series, with a master-slave configuration.

2007-03-25 22:16:26 · answer #2 · answered by dudara 4 · 0 0

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