Does a radio use less power when the volume is low compared to when the volume is high ?

Answer 1

The radio signal reception and processing sections of the radio, no, they do not use more power. The power consumption by these sections is the same, regardless of what the volume level is. The audio output section is a different issue. If more volume is being created, would it not stand to reason that more current is needed to produce more sound loudness? That extra energy has to come from some where, so again, would it not be reasonable to at least consider the possibility that more energy from the battery is needed to get the greater sound level out of the radio? Sound level does not come from the received radio wave, so where do you think the greater sound level comes from?

Answer 2

The volume control is a potentiometer, (variable resistor).
It regulates the flow of power.
What do you think?

Answer 3

Yes, it does

Answer 4

Leveraging high-volume GaAs production for RF GaN

Keith Gurnett and Tom Adams

Available online 14 September 2006.

With the recent introduction of its new line of gallium nitride high-power amplifiers, RF Micro Devices®, Inc. (RFMD®) has provided a product family that can significantly upgrade the efficiency of cellular base stations and similar applications. In doing so, the firm has skillfully leveraged its existing manufacturing facility to produce the GaN amplifiers at marginal cost.

RFMD's new high-power amplifiers (HPAs) are made with GaN transistors, which are manufactured using an advanced 0.5μm GaN HEMT (High Electron Mobility Transistor) semiconductor process. They are designed to outperform silicon LDMOS (Lateral Double Diffuse MOS Transistors), and have a peak drain efficiency of up to 67%, which is an increase of 5–10% over the efficiency provided by LDMOS transistors currently used in cellular base stations.

Comparing against 60W LDMOS transistors, RFMD 60W GaN transistors have higher impedance at the package lead (typically 56–j2.3 ohms in the input, and 22+j3.7 ohms on the output), higher peak drain efficiency (67–69%), lower IM3 variation over a wider bandwidth (>50MHz) and lower parasitic output capacitance (0.11pF/W). The new HPAs also have a high gain of 16dB, high power density (up to 4W/mm at 28V) and excellent 1,000 hour reliability at elevated channel temperatures approaching 300°C.
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Figure 1. Inside a clean room at Greensboro, North Carolina. RFMD takes advantage of its existing facility to run 3-, 4- and 6-inch wafer lines. GaN is 3-inch only; GaAs is 4-inch and 6-inch.

The primary application for this new line of HPAs will of course be in cellular base stations, where the GaN transistors will increase the efficiency in high-linearity applications, including UMTS. Linearity is the ability to pass the signal through the amplifier with minimal distortion of the signal characteristics. It is important in cell phone transmissions, and will also play a large future role in other forms of communication. Also significant is the peak-to-average ratio – the difference in power level between times when digital information is streaming into or out of the Internet, and times when there is no transmission.

“You're dealing with large peak-to-average ratios (PARs), so there are some pretty significant linearity requirements as well efficiency considerations,” says Jeff Shealy, vice president of RFMD's Infrastructure Product Group, speaking of the cellular base stations' performance. “Obviously linearity competes with efficiency, so circuit techniques that you would employ to optimize for efficiency are more favorable for GaN.”

RFMD has designed the new lines of GaN transistors to operate at a base plate temperature from −40°C to +95°C – the ambient temperature defined at the surface of the board just below the transistor. The combination of higher junction temperatures and increased efficiency gives the advantage of greater coverage or increased reliability. The choice is with the application designer.

RFMD's GaN transistors have higher matching impedance at the package level than LDMOS transistors. The combination of higher power density, higher efficiency and wider broadband performance, when compared to a similar silicon LDMOS device, enables HPA designers to achieve a given power target performance using fewer devices. Providing wider bandwidth also permits fewer transceivers that can cover more frequency bands. The overall effect is to reduce size, complexity and cooling requirements of a tower installation for a given area coverage and user numbers.

The silicon LDMOS device does not provide such an acceptable level of RF power performance at the operating frequency of WiMAX 3.5GHz, and its junction operating temperature (150°C) is significantly lower than GaN (200°C). This in itself allows more power in the case of GaN for a given set of ambient conditions at a comparable cooling burden.

David Aichele, Director of Infrastructure Business Development at RFMD, explains that it is the base station original equipment manufacturer (OEM) that determines the output power that is needed for coverage in a given geographic area. WiMAX (Worldwide Interoperability for Microwave Access) is a technology framework that typically provides coverage of ranges of 1–6 miles, and potentially up to 30 miles in line-of-sight environments. WiMAX and WiFi are roughly similar protocols for using radio signals to transmit data from one computer to another. WiFi, though, has a range that is limited to about 100 feet and is used in local hot spot centres such as Internet cafes, local business and home networks, while WiMAX provides greater coverage up to metropolitan access networks and cellular backhaul.

WiMAX is not limited to cell phone transmissions, but can also handle broadband Internet data. The potential is there to handle Internet access, video and VoIP (Voice Over Internet Protocol) simultaneously. In practical terms, WiMAX should make possible a wireless replacement for the “last mile” of transmission, meaning the local distance between the base station and the consumer, a distance that is now usually covered by cable or wire.

“The key for the HPA is not more power but more efficient and wider bandwidth,” Aichele notes. “Providing more efficiency lowers the cooling burden and operating costs. Providing wider bandwidth leads to the potential of fewer transceivers covering more frequency bands.” Higher efficiency means that lower input power is required for a given output. Higher efficiency also means less power is dissipated by the device itself; consequently, there is less need for cooling. A wider bandwidth permits a single tower to carry more individual customers, with the result that the parent company may need fewer towers and fewer HPAs.

There are significant differences in physical and electrical properties between GaAs HBT technology and GaN HEMT technology. GaAs HBT, for example, would not be an optimal choice for making high-voltage HPAs for cell phone towers. Similarly, GaN HEMTs would not be optimal for making a low-voltage handset power amplifier. But in RFMD's plant in Greensboro, North Carolina, (the world's largest III-V manufacturing facility for electronics) GaAs and GaN wafers run side by side.
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Figure 2. GaN 3-inch wafer at RFMD. This is manufactured using 4-inch tooling from earlier lines modified to carry the 3-inch wafers.

“The plant has two 6-in fabs and one 4-in fab for GaAs,” vice president Shealy explains. “We have adapted some of the 4-in tooling (obsoleted when we converted capacity to 6-in) and made it 3-in for our GaN technology. While the GaAs wafers are either 4-in or 6-in, all of the GaN wafers are 3-in, so we have 3-in and 4-in wafers running side by side,” he says. There are no current plans to move GaN to 4-in diameter until wafer volumes drive the decision.

“The GaN crystals themselves are grown at a significantly higher temperature than GaAs, but in similar tool sets,” Shealy notes. “The material is very inert and very rugged, and we get a rugged device when we are finished processing it.” Since GaN is grown at very high temperatures, it's very difficult to dissociate that material. Standard GaAs processes work quite well, including dry etching, implant isolation and photolithography. With few exceptions, GaAs process tools and processes are fairly transparent. Obviously, the recipes are different.

RFMD has kept its factory in North Carolina (rather than moving it to Asia) because of dominant tooling costs. The projected market for GaN RF wafers, as Shealy notes, is only one-tenth of the existing market for GaAs wafers, so the production cost for GaN wafers requires careful consideration. “We are able to leverage our GaAs costs in producing our GaN wafers,” Shealy explains. The cost of a wafer produced in a factory is driven by the capitalization costs of the factory, the total factory operating expenses per unit of time, and the number of wafers produced per unit time.

“The more wafers you are able to manufacture in a given time using an existing asset, the lower the cost per wafer,” Shealy says. “We're manufacturing GaN in a fully depreciated GaAs factory alongside an enormous volume of GaAs production. In terms of capitalization investment, they've already been made. There are some minor tooling costs for adaptation of the 3-in diameter, but they are significantly lower than the cost of new tooling.”

The wafers are produced in Greensboro, he adds. However, production backend processes (e.g. packaging and testing) are much more labour-intensive and are typically located offshore.

There are potential markets outside of cellular base stations for GaN devices, Shealy notes. RFMD currently contracts with DOD (Department of Defense) agencies on an R&D basis while preparing its technology for system insertion. Charting the Wireless Future (part 2)

DrMike Cooke1

Available online 24 May 2006.

Wireless technology has already taken compound semiconductor devices into the mass market with the mobile phone. Are there similar opportunities, and mass markets, beckoning beyond 10GHz where the case for compound is even more compelling? And would the compound industry be able to cope with massively increased volumes?

Article Outline

Millimetre waves
Mass production challenge


While the “International Technology Roadmap for Semiconductors” (ITRS) was originally set up to promote digital silicon CMOS for PCs, it has been forced in more recent years to look beyond that market (http://public.itrs.net). From the III-Vs perspective, the most important addition came in 2003, with the discussion of wireless technologies, spurred by the phenomenal success of the mobile phone. In 2005, this discussion became a separate chapter.

A previous article (III-Vs Review, March 2006) looked at the III-V and alternative technologies aimed at the power amplifier needs of mobile phones and the base station connection to the fixed network. The ITRS also discusses the much more speculative needs for devices operating at frequencies far beyond the couple of GHz of present mobile communications, along with the challenges of moving an industry from niche applications into the mass market.
Millimetre waves

Although “millimetre waves” strictly cover the wavelength range 10–1mm and the frequencies 30–300GHz, the ITRS notes that the challenges for semiconductor technology in the 10–30GHz range have many of the characteristics of the higher frequencies. There is currently no mass market comparable to the mobile phone and the whole 10–100GHZ radio frequency range is dominated by low volume compound semiconductor production. The ITRS expects that automotive radar for safety applications such as collision avoidance and wireless local area networking (WLAN) could create a mass mm-wave market (Figure 1). Other possible applications include contraband detection and all-weather aircraft landing technologies.

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Figure 1. Projections for mm-wave band applications.

Ironically, since the ITRS is seeking future mass markets for mm-wave technology, it can only project technology requirements in the “near term” (up to about 2011). Also the meaning of “near term” is different than for other ITRS sections. Reflecting the speculative, developmental state of mm-wave technology, here “near term” means “until large volume commercial applications such as automotive radar and local multipoint distribution services (LMDS) emerge.”

LMDS is a broadband wireless technology designed to operate at 25GHz+ to deliver voice, data, internet and video services using a line-of-sight cellular architecture. This technology was mooted and some trials made before the internet bubble burst in 2000, but LMDS has been very much on the back burner since then. In the absence of an actual mass market for any mm-wave device, it is perhaps wise to leave the options open beyond development of technology capable of handling higher frequencies. Further, III-V technology is rapidly changing, making longer term projections difficult. Another speculative application in this frequency range is satellite networking such as the very small aperture terminal (VSAT) technology.

There is a wide range of III-V-based devices available. Analogue mm-wave applications are presently covered by mainly by high electron mobility transistors in its traditional (HEMT) and pseudomorphic (PHEMT) forms. Mixed-signal and high speed digital applications tend to look to GaAs MESFETs and heterojunction bipolar transistors (HBTs).

Advanced HEMTs operating in circuits with enhancement and depletion (ED) mode devices tend to offer higher frequency operation and consume less power than the HBT alternatives when scaled below 0.1micron. However, HBTs have much better threshold voltage control. This control is a function of bandgap, a material property, rather than the process-dependent Schottky barriers and Fermi levels that set the threshold in HEMTs. HBTs are preferred for high dynamic range applications (e.g. automotive radar) due to these devices’ high linearity and lower 1/f noise. HBTs are also often used to make low-noise oscillators at these frequencies.

The 10–40GHz range will see increasing competition from silicon-based technologies - RF CMOS or SiGe. To enable these technologies to operate effectively at these frequencies, high resistivity, low-loss Si substrate advances are needed. Shrinking CMOS technologies are expected to provide low-resolution circuits up to 10–20GHz, and SiGe HBTs are expected to extend this to 40GHz or even 77GHz. CMOS is limited in dynamic range because its breakdown voltage is less than 2V, a situation that worsens as device sizes shrink.

Increased power levels require either a higher voltage or current. Higher voltage breakdown is also necessary for the analogue needs of mixed-signal. Increased operating voltage comes at the expense of frequency performance or gain. Trade-offs exist between power, efficiency, breakdown, noise figure (NF), linearity and other parameters. The ITRS tables focus on NF, power, efficiency, breakdown voltage and to a lesser extent lithography. The requirements for the various high frequency devices - mixers, oscillators, varactors, switches, phase shifters - can be embodied in small signal (low noise) and large signal (power) functions. The ITRS tables give requirements for low noise and power operation of GaAs PHEMTs, InP HEMTs, GaAs MHEMTs and GaN HEMTs (Figure 2). Since the InP and SiGe HBTs are not suited to power operation, only one set of requirements is given for these.

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Figure 2. HEMT schematic and table with example variations for different types.

While lithography is not a primary driver, higher frequency figures of merit - the maximum transit frequency (fT) and fmax - do need smaller device dimensions. However, shrinks are not occurring as fast as predicted in 2003-04 - 70nm gates are not now expected until 2007. Given the low volumes typical in the present mm-wave industry, direct write e-beam (DWEB) lithography is commonly used so these requirements do not pose much difficulty. The move to mass production markets would create more need for the high throughput, high resolution lithography developed for silicon.

All the HEMT varieties use layers of different bandgap materials (Figure 2). The plain HEMT structure is a field effect transistor on a lattice-matched substrate, with carriers provided by a highly doped layer, while the channel consists of an adjacent undoped layer. Much higher mobility results from the lack of ionised centre scattering in the undoped layer compared with traditional doped channel FETs such as CMOS and MES. The plain HEMT is being developed for mm-wave applications using InP and GaN bases.

The pseudo- and the newer meta-morphic varieties are being largely developed in the more mature GaAs materials and processes. PHEMTs consist of layers of material on a close, but not lattice-matched, substrate. This creates a channel with higher carrier mobility than in plain HEMTs. In the MHEMT, the layers are applied to a mismatched substrate. The resulting strain is taken up by a specially designed buffer layer.

GaAs PHEMTs can operate at higher voltage than InP HEMTs, but tend to be gain limited at higher mm-wave frequencies. InP HEMTs have superior frequency operation, but are limited beyond low voltage/low power applications. These two devices are the mainstay of mm-wave applications, with PHEMTs preferred for the lower frequencies because of lower costs. GaAs PHEMTs up to 60GHz, and even 94GHz, have been reported. Neither technology has the power performance required for future systems.

Engineers need the high frequency gain of InP HEMTs at the voltage levels of GaAs PHEMTs. The MHEMT structure's design flexibility can provide higher performance than PHEMT at the same gate dimension. Enhancement and depletion (ED) mode PHEMT/MHEMT devices are also candidates for high speed digital circuits due to their lower power consumption than bipolar. MHEMT devices are expected to be available for production this year and to gain headway in the market. PHEMT use is expected to decline in defence applications, moving to InP HEMT in the near term and then MHEMT. GaAs PHEMT and InP HEMT use could even be eclipsed altogether by MHEMTs in the 40–100+GHz range by the end of the decade.
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GaN HEMT technology is advancing faster than predicted in the 2003-04 versions of the ITRS roadmap. Devices with five to ten times the power density of GaAs PHEMTs have been demonstrated at microwave frequencies. This performance is achieved through a combination of high current density and a higher operating voltage with only a “modest” reduction in gain compared with GaAs PHEMTs. Continued development is expected to make GaN HEMT the “premier and preferred device for mm-wave power applications” to perhaps as high as 40GHz. Material quality is still an issue for volume applications. With maturity and improved reliability, GaN will be applied in power amplifiers and high dynamic range low-noise amplifiers (LNAs).

HBTs for use in the 10GHz+ range are usually constructed on InP or silicon, since HBTs on GaAs substrates are restricted to the sub-10GHz performance range. InP devices use ternary or quaternary layers containing a number of III-V elements such as In, Ga, As, Sb and P that change the position and width of the bandgap. These layers are closely lattice-matched to the InP substrate. The SiGe HBT consists of single-crystal layers on a Si substrate. The performance gap between the two HBT technologies is closing, but InP will continue to have a higher breakdown voltage advantage through careful device scaling and wide bandgap collectors, while SiGe BiCMOS will have an integration density advantage for greater system complexity. The much smaller 100mm diameter of InP substrates constitutes a productivity barrier. Silicon substrates of 200mm are now standard and allow more than four times the number of transistors per wafer compared with InP.

InP HBTs are predicted to run at 100GHz in the near term and are already finding application niches at clock rates below 60GHz where their combination of dynamic range, breakdown voltage and high speed is required. SiGe technologies cannot meet these specifications. Additional InP opportunities exist in optical network control and routing applications although this market was one of the most heavily hit by the high-tech slump in 2001 that created a major decline in most semiconductor markets.

Another consideration is that technologies that increase wireless communication bandwidth through real-time correction and synthesis of analogue signals using digital technologies need mixed-signal circuits that run at 3–10× the analogue carrier frequency, favouring InP.

According to the ITRS, new GaAs MESFETs designs are unlikely beyond this year with use only in legacy applications, with obsolescence expected by the end of this decade. Production will likely be only at foundries. Present MESFET applications are forecast to be taken up by InP/SiGe HBT technologies and InP HEMTs (where GaAs MESFETs are used in defence). A summary of expected mm-wave device capabilities is given in a series of bubble diagrams (Figure 3).

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Figure 3. Bubble diagrams indicating device capabilities for various applications. Top figure: Power figure of merit = power density (W/mm) × SS gain per stage (dB) at application centre frequency with typically 10–20% bandwidth. Lower figure: Low noise. Figure on next page: Digital (normalised scale).

Mass production challenge

Moving to higher production rates in the compound semiconductor industry will need some big changes. The sector does not have the decades of experience and intensive investment of the silicon behemoth. This is not necessarily a bad thing, since one would hope for increases in compound production volumes yielding unit cost decreases on a “learning curve” similar to Si in its early years with a commensurate increase in volume and profit for those at the leading edge.

Presently, the military, space and speciality markets for millimetre wave monolithic microwave IC (MMICs) can be satisfied by relatively small volumes - 10–100 wafers/year/per process or device technology (HBT, 0.5micron HEMT, 0.25micron HEMT, 0.15micron HEMT, in GaAs, InP, GaN) are typical, according to the ITRS. With wafer sizes of 100–150mm, chip sizes of 2–10mm2, and composite yields of 50–75%, this translates to tens of thousands of chips per year - not the millions typical of demand from digital electronics and wireless handsets. Low volume production presents a particular challenge for the economic viability and practicability of mm-wave device foundries.

Foundry processes would need a wafer demand at the hundreds of wafers per year per process technology level. Such production scales are also needed for scientific yield improvement from statistical process control (SPC) and other computer assisted manufacturing (CAM) techniques to be feasible. Today's smaller volumes, process variations and “boutique” offerings thus come at the cost of overall process stability.

It would be nice if one could simply transfer the mass production techniques of silicon, but life is more complicated - silicon tools and chemicals are focused on a different set of concerns from III-V device technologies.

First, there are some non-standard structures in mm-wave devices such as substrate vias for low inductance grounds in microstrip circuits, low parasistic air-bridge interconnects and non-native oxide passivation layers. While substrate vias are well established in GaAs devices, these are under development in SiC and GaN, with qualification expected to take up to 2009.

In power devices, thermal dissipation is critical. While GaN and SiC have higher thermal conductivities compared with GaAs and InP, the typical 5–10× higher power density of these devices offsets this somewhat. Proven thermal dissipation techniques include wafers thinned down to 50micron before packaging (a tricky process for fragile GaAs), thermal shunts and bathtub vias.

The III-V substrate materials are often much heavier - for example, bulk GaAs has twice the mass density of Si. GaAs's fragility means that wafers have to be 0.6mm thick for processing, 50% greater than typical for Si wafers. Automated wafer handling systems designed for silicon would have to be adjusted for the heavier wafers.

Wafer size also matters. The silicon production industry is still transitioning from 200mm to 300mm wafers for its highest volume products - high density memory and advanced microprocessors. Since the latest technological advances are frequently targeted on this market, the newest tools often cannot handle wafers smaller than 200mm. The largest wafer diameter III-V material, GaAs, routinely has semi-insulating wafer diameters at 150mm, although some facilities still work with 100mm substrates. The ITRS expects that 200mm GaAs substrates will be in development until 2007, with qualification due to take a further three years to 2010. Industry pressure to move to the larger diameter will only come with increased demand for economies of scale and lower chip costs and the availability of tools able to handle 200mm GaAs wafers.

While GaAs is about two generations behind Si in terms of wafer size, InP is a further generation out. InP wafers are presently 100mm, with 150mm in development and sampling up to 2007. Qualification is again expected to take a further three years to 2010.

SiC substrate sizes still suffer from significantly high defect densities. Wafer diameters are typically 50mm. Most GaN HEMT devices for the mm-wave market are produced on SiC. There is no production source of semi-insulating bulk GaN substrates, although some material is produced for research and development. The ITRS views single crystal GaN bulk substrates as requiring research to 2007, development to 2011 and qualification to 2014. Improvement in SiC substrates is expected in the nearer term. Here, the research is complete and development is needed up to 2009 and qualification to 2012.