Design a Junction Field Effect Transistor (JFET) amplifier?

Question

Required Specifications:
Voltage Gain: > 10
Input Resistance: >100 kΩ
Load Resistance: 100 kΩ
Supply Voltage: 30 V
Output Voltage Swing: > 10 V peak-to-peak
Operating Frequency: 1 kHz

Answer 1

Here is the basic circuit:
http://hyperphysics.phy-astr.gsu.edu/hbase/electronic/fet.html#c1

In this circuit, Rg will determine most of the input resistance. Look up the specifications of your FET on the data sheet and find the gate-to-source resistance. The parallel combination of the gate-to-source resistance and Rg will be your input resistance.

Cs should be large (i.e. over 10 uF). The AC coupling capacitors on the input and output can be relatively small (i.e. less than 1 uF) because of the high input and output resistances. Rs needs to be big enough so that the output voltage swings low on the low side of a 10 volt-pp swing, but it probably will still be less than 1k Ohms.

'Rd' will determine your gain. Look up the transconductance of the FET in the datasheet (gm) and the amplification factor (greek letter 'mu') or the drain resistance (rd). If the internal drain resistance is not given it can be calculated:
rd = gm / mu
The overall gain = -gm * (rd || Rd)
Choose Rd so that the gain = 10 and remember that it is inverted (minus sign on the gm).

When there is no signal at the input, the voltage Vd should be
around 15 volts. Add another resistor from the gate to Vdd and adjust it to that the FET is conducting current and that the voltage at the drain is around 15 volts -- this way you'll get your 10 V-pp swing.

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Answer 2

Jfet Amplifier Design

Answer 3

Bipolar's conduction is controlled via emitter-base bias cutting-edge. Bipolar has an extremely low enter impedance. With FET a bias Voltage is used to regulate this is conduction. FET has an extremely severe enter impedance..