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How to get a differential gain > 40V/V with a diferential pair with PMOS input stage and resistive loads with Vdd=2.5V, Vss=-2.5V and Vo=0V by changing any value of bias current, transistor size and resistance?

Differential Amplifier with Resistive Loads

* Set options
.option post probe

* Element Statements
vdd vdd 0 2.5
vss vss 0 -2.5
m1 vout- vin+ 1 vss cmosn w=100u l=1.0u
m2 vout+ vin- 1 vss cmosn w=100u l=1.0u
r1 vdd vout- 50k
r2 vdd vout+ 50k
i1 1 vss 100u
e1 vin+ 2 3 vss 0.5
e2 vin- 2 3 vss -0.5
vcm 2 vss 2.5
vs 3 vss dc=0

* Control statements
.dc vs -0.5 0.5 0.01
.probe v(vout+,vout-)
.tf v(vout+,vout-) vs
.op

* Include device model with filename "cmos05.mod"
.include cmos05.mod

.end

2007-09-29 13:50:18 · 1 answers · asked by Earthman 2 in Science & Mathematics Engineering

1 answers

Since you're not going to change the transconductance of the devices about the only thing you -can- to is increase the load impedance (since load impedance times transconductance equals stage gain). And you'll also have to increase the supply voltage(s) to keep the currents the same (because the transconductance is a function of source-drain current).

Doug

2007-09-29 14:23:57 · answer #1 · answered by doug_donaghue 7 · 0 0

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