whats the difference between signal standards such as ECL, LVDS, and TTL?

Answer 1

The differences lie in the input and output voltages, mainly. ECL may be either positive or negative although standard ECL uses negative voltages.

The 4 most common parameters are Vol, Voh, Vil, and Vih -- - Vol is the voltage at the output pin when the signal is low
- Voh is the voltage at the output pin when the signal is high
- Vil is the voltage at the input pin necessary to switch the device to a low state.
- Vih is the voltage at the input pin necessary to switch the device to a high state.

Other parameters such as drive current and fanin are also different for each logic family.

LVDS is a differential standard (vs. single-ended for TTL and ECL)


Basic TTL:
Voh - 0.4V
Vol - 2.4V
Vih - 2.0V
Vil - 0.8V

LVDS:
Voh - 1.25V Vol for voltage on the pair in the opposite direction
Vih - 0.35V Vil for voltage on the pair in the opposite direction

NECL:
Voh - (-0.9V)
Vol - (-1.8V)
Vih - (-1V)
Vil - (-1.7)

Rarely may logic families be mixed. None of these 3 families may be mixed, but there are a few kinds that may be mixed.
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Answer 2

The nature of these three interfaces are as followed :

TTL uses relative large voltage swing to send a signal to the target. Good for 33 MHz and less.

ECL uses low impedence high current drive to send signal to the target. Good up to about 1 GHz.

LVDS is the modern inetrface, that uses 100 ohm differential impendence, and very small voltage swing to send the signal to the target, with low power and high speed. Good for 200MHz and up.