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can somebody help me design an integrator with the ff:

V0 = 5000 ∫xdt
where x = -0.004coswt and f = 100Hz.
kindly show solution to the design.
Thanks

2007-05-19 00:44:52 · 2 answers · asked by blue 2 in Science & Mathematics Engineering

2 answers

You use an op amp with the integration function supplied by negative feedback. Since you require a positive gain times the integral, you apply the signal to the noninverting input. A series resistor is not needed. See ref. 2, section 2 to understand the basis of a noninverting amplifier.
A digression: The essential point about a feedback controlled op amp is that it isn't just trying to keep its inverting input at zero (which is easy to believe if you're accustomed to using only traditional, signal-applied-to-inverting- input circuits), it's actually trying to keep both inputs, inverting and noninverting, equal. So as long as the feedback control circuit uses the inverting input (which it must), the input signal can enter at either input. The feedback circuit consists of one or more components connected from output to inverting input, and one or more components connected from inverting input to input signal (for inverting circuits) or to ground (for noninverting circuits). End of digression.
The inverting input is grounded via a resistor Ri and a feedback loop consisting of a capacitor Cf is connected from output to inverting input. The time constant Ri*Cf should be 1/5000 sec, or 0.0002 sec. Reasonable values would be Ri=10 Kohm, Cf=0.02 uF, but there is considerable flexibility to accommodate goals of, e.g., low input signal loading, low susceptibility to cross-coupling, etc. Ref. 1 explains the theory.
The output will be the integral of -0.004 * cos(w*t) = -0.004 * sin(w*t) / w, times 5000, or about -0.032*sin(w*t), with an added constant which depends on initial conditions.
If you want to reduce the integrator's theoretically infinite DC gain to "wash out" the constant and reduce drift due to input or op-amp bias, you can introduce low-frequency attenuation by adding a resistance Rf in parallel with Cf. The DC gain will then be -Rf/Ri. See ref. 2, section 4. This is no longer an "ideal" integrator, and the gain at 100 Hz will be somewhat reduced. However, if Rf is a sufficiently large multiple of Ri, the reduction won't be significant. If the gain reduction is unacceptable, you may need to trim either the Ri or Cf value downward slightly to obtain desired gain.

2007-05-20 03:59:22 · answer #1 · answered by kirchwey 7 · 1 0

Make a potential divider, 3 resistors on top of one Feed the three voltages onto the top of the 'flower' and measure at the point they join, which will be 3/4 of the average. Use an op-amp to amplify it by 4/3

2016-05-17 09:03:22 · answer #2 · answered by ? 3 · 0 0

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