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What does a single logic gate look like?
Are they the source of technology (do they make up computers)?
are they things with 1's and 0's?

if any of these questions can be answered by you, please tell me.

2007-03-03 08:35:38 · 5 answers · asked by Russly F 3 in Science & Mathematics Engineering

5 answers

A single logic gate will be very small, perhaps EXTREMELY small - many millions can be put on a single integrated circuit.
Many millions of them put together like this are what make up integrated circuits. A logic gate is made up of a small number of transistors. (like 2 or 3)

They are the things with 1s and 0s. A logic gate performs a very basic logic function. For instance, a gate might perform a logical "or". It would have 2 inputs and 1 output, and if either of the two inputs is on (or both), then the output will be on.

Another might be a logical "and": If both inuts are on, then output is on (a value of 1). Otherwise, its off (value 0).

You could also have NAND gates (not and), or NOR gates (not or). Combining gates can perform more complex logic, like OR among three or more inputs, etc.

2007-03-03 08:45:27 · answer #1 · answered by Jim S 5 · 0 0

How Logic Gates Work

2016-10-15 04:48:20 · answer #2 · answered by ? 4 · 0 0

one can imagine a logic gate as to be a combination of a few transistors in an integrated circuit.
Those circuits are manifactured to be compatible to each other in current and voltage. so on design time you do not have to worry much about voltages anymore.
For this reason you design a complex circuit in a way that you say 5Volt is HIGH or 1 and 0Volt is LOW or 0 .. for example

Such a circuit has a few inputs and normally one output.
so when you put a defined voltage to these inputs the gate decides logically what potential you get on the output.

you can see rudimental examples of these circuits by searching google for datasheets of the 74 series (7400 for example) or 40xx series (4012 for example) .
the 7400 for example is a chip with 4 such logic gates inside.

technology has changed over the years so today there are already circuits where you can program which kind of logic gate you want to have inside.
Modern chips like in your PC do include highly complex circuits of such gates

2007-03-03 11:37:20 · answer #3 · answered by blondnirvana 5 · 0 0

Logic gates are made of different semiconductor technologies. CMOS (complementary metal oxide semiconductor) is currently the most used logic gate technology.

CMOS gates are built using only two building blocks: PMOS (positive metal oxide semiconductor) transistor, and NMOS (negative metal oxide semiconductor) transistors. A transistor is a switch that turns on or off (closed or opened circuit) by the voltage level applied to its "gate." PMOS turns on when the gate voltage is low and off when high. NMOS does the reverse, on when high and off when low.

Using those two transistors, two basic elementary gates are constructed: the inverter, and the NAND gate. The combination of these two gates make other basic gates, and hence the digital logic circuits.

An inverter is made by stacking a PMOS on top of an NMOS, wire their middle point to the output, and connect their two gates together to the input. When the input voltage is low, the bottom NMOS opens while the top PMOS shorts to pull the inverter output up to logic high voltage. When the input is high, reversely, the output goes low.

A 2-input NAND gate is made by connecting two PMOS in parallel then on top of two NMOS in series. The output is where the pair of PMOS connects to an NMOS. Each of the two inputs is made by connecting one PMOS gate to one NMOS gate pairwise. This structure is two inverters having parallel pull-ups and serial pull-downs. When either of the inputs is low the output is high. And when both output are high the input is low.

A two-input AND gate is made by adding an inverter to the output of a NAND gate.

A two-input OR gate is made by adding two inverters, one to each of the two inputs of the NAND gage.

Note that in theory we can connect two PMOS in series and two NMOS in parallel to make a two-input NOR gate as a duality of the NAND gate. But in practice we try to avoid putting PMOS transistors in series so to use less silicon area. This is because, for the same current carrying capability a PMOS takes 2.5 times more die area than does an NMOS. And this is, in turn, due to the mobility of electrons being 2.5 times that of holes.

Hope that was not too long.

2007-03-03 12:48:51 · answer #4 · answered by sciquest 4 · 0 0

I agree with Jim S.

2007-03-03 09:43:03 · answer #5 · answered by Pramod 3 · 0 0

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