What is the difference between a CPLD and a FPGA? Which one is better to design a custom CPU?

Question

I´m interested in emulating a PIC architecture.
Thanks!

Answer 1

Many of the answers you have received so far are correct. I am writing to add my take on this question. In general, a CPLD does not contain as many logic resources nor additional functions such as hardware multipliers and block RAM. FPGAs can now contain several million gates and support additional functions in hardware including RAM, multipliers, high speed serial interfaces, and even processors.

In practice, I tend to use FPGAs because the cost per gate is so low that you can find one capable of fitting large projects into it. I use Xilinx devices almost exclusively although I have used Altera in the past and previous to that I used the PALs and GALs (the good old days of ABEL and the 22V10, 16L8, etc). CPLDs such as Xilinx's CoolRunner series offer very low power consumption which can be very desirable for battery powered applications. CPLDs also offer nonvolatile storage of their configuration (not nonvolatile storage of run time data) which can be useful for some designs at power up versus SRAM based FPGAs which need to load up. There are other families of FPGAs that emulate this CPLD quality, such as QuickLogic and Actel offerings which are fused or flashbased technologies. These also can offer power savings over the SRAM based FPGAs from Altera and Xilinx.

You might want to check out the Xilinx line (see link below). They offer free tools for VHDL/Verilog programming of their CPLDs and FPGAs and I believe they also offer a free PicoBlaze 8 bit processor core for these as well. There is a Microblaze 32 bit core available but I believe this one requires purchasing some tools. The largest Xilinx CPLD has 512 macrocells...I tend to use the Spartan 3 200K gate device for many projects...I believe either of these may work for a PIC emulation. Altera also offers free tools for their devices.

By the way, the tools you use may also dictate which device and/or family you gravitate towards. I do digital signal processing with FPGAs and make use of Xilinx's System Generator add on product for Matlab and Simulink. This tool only supports Xilinx FPGAs and does not work for their CPLDs...but then most of the things I do with it requires Block RAM and hardware multipliers which are not supported within their CPLDs anyway.

Hope this helps!!

Answer 2

"Mariko" gives a decent explanation. However, some FPGA's have on-board PROM (Lattice MachXO). So memory is not really the difference. The real difference between CPLDs and FPGAs are the internal architecture. While they are different, it is transparent to the programmer unless you are trying to utilize special features, or run at extremely high speeds. CLPDs offer true instant on, while even lattice's MachXO requires 1 mS to configure. For the designer, this means when designing with an FPGA it is important to use pull-up and down resistors to hold pins at desired states during power up configuration (~40 mS depending on FPGA density).

The different architectures also cause different viable density levels. As a result, the amount of logic that can fit into a CPLD is relatively low as compared to a FPGA who's densities are still growing.

CPLDs require only 1 voltage, as where most FPGAs requires 2 - 3 Voltages, and the external PROM. This adds complexity to a small home design where your PCB is typically only 2 layers.

I would suggest writing all of your code before selecting a device, if you can write it efficiently enough to fit into a small CPLD then pick that for PCB complexity reasons. If your code gets too big to fit, or starts to approach 85% utilization, then switch to an FPGA.

Answer 3

This Site Might Help You.

RE:
What is the difference between a CPLD and a FPGA? Which one is better to design a custom CPU?
I´m interested in emulating a PIC architecture.
Thanks!

Answer 4

Well a CPLD is a Complex Programmable Logic Device and and FPGA is a Field Programmable Gate Array. Basically the diference is that CPLD's have on chip non volatile memory and FPGA's don't. FPGA's need a PROM to load the bit stream of data into the chip while CPLD's don't.

Here's some additional info:

CPLD stands for Complex Programmable Logic Device. It is a programmable logic device with complexity between that of FPGAs and PALs, and architectural features from both. The building block of a CPLD is the macro cell, which contains logic implementing disjunctive normal form expressions and more specialized logic operations.

Features in common with PALs:

Non-volatile configuration memory. Unlike many FPGAs, an external configuration PROM isn't required, and the CPLD can function immediately on system start-up.
For all but the largest devices, routing constrains most logic blocks to have input and output signals connected to external pins (little opportunity for internal state storage or deeply layered logic).
Features in common with FPGAs:

Large number of gates available. CPLDs typically have the equivalent of thousands to tens of thousands of logic gates, allowing implementation of moderately complicated data processing devices. PALs typically have a few hundred gate equivalents at most, while FPGAs typically range from tens of thousands to several million.

Some provisions for logic more flexible than sum-of-product expressions, including complicated feedback paths between macro cells, and specialized logic for implementing various commonly-used functions (such as integer arithmetic).
The most noticeable difference between a large CPLD and a small FPGA is the presence of on-chip non-volatile memory in the CPLD. The differences in architectural approach become more apparent farther from this intermediate region.

Answer 5

Fpga Vs Cpld

Answer 6

Cpld Vs Fpga

Answer 7

FPGAs are more modern, and therefore cheaper, especially in small orders. They are often used for prototyping and emulation tasks. See the link below for a comprehensive explanation.