In testing,what is the difference between validation and verification?

Question

this is the testing tool question

Answer 1

Design verification means confirmation by examination and provision of objective evidence that specified requirements have been fulfilled.

Design validation means establishing by objective evidence that device (product) specifications conform with user needs and intended use(s).

You verify a design by checking drawings and specs, running simulations, checking that all design requirements have been addressed, that calculations are correct, etc. It's mainly a "paper" exercise and when you are through with it you should be quite confident that the design is complete and that a product that will eventually be built according to those drawings and specs stands a good chance of conforming to the requirements in the real world.

You validate a design by trying out actual products (an initial run or batch of products), built as above by real workers, installed and operated in the real environment of use by real operators, etc. It's the proverbial proof of the pudding where you can catch errors and other problems that escaped all former verification efforts ... and others bugs that might have crept in later on.

Answer 2

Valid means approved. Verification means Undergoing Scrutiny (enquiry). After Verification, Validation come in to force.