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2 answers

(using 8085 processor's assembly level language) :

say, 1st 16-bit no's LSB is stored at 8003H & it's MSB at 8004H. And 2nd 16-bit no's LSB at 8005H & MSB at 8006H.

LHLD 8003H
XCHG
LHLD 8005H
DAD D
SHLD 8007H
MVI A, 00H
ADC A
STA 8009H

2007-01-24 00:04:59 · answer #1 · answered by Innocence Redefined 5 · 0 0

have you ever tried EMU8086? it is an 8086 emulator. you may attempt out your classes with it. besides, enable's say the first 32 bit variety is interior the registers ax and bx i.e. ax will include the first 16 bit and bx the purely appropriate 16 little bit of the variety. the 2d variety is in cx and dx. If the first variety is 1F001 and the 2d is 2F002 the code ought to look as if this: mov ax,a million mov bx,F001 mov cx,2 mov dx,F002 upload bx,dx adc ax,cx After this code is administered the sign up ax must be 4 and bx E003 so the properly result's 4E003. at the same time as 2 numbers are extra and the properly result's too massive to in good structure right into a sign up then the carry flag of the CPU is desirous to at least a million. So after bx and cx were extra the carry flag become a million. adc stands for "upload with carry", meaning it is going to upload 2 numbers and also also upload the carry flag to the properly result. So "adc ax,cx" would subsequently calculate a million+2+a million. i do not understand what your instructor ability through "keep the properly result into the thoughts component of memory"

2016-10-16 00:55:48 · answer #2 · answered by tenuta 4 · 0 0

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